{"id":2142,"date":"2022-11-10T12:25:26","date_gmt":"2022-11-10T07:25:26","guid":{"rendered":"https:\/\/habib.edu.pk\/graduate-directory\/?post_type=graduate&p=2142"},"modified":"2022-11-17T17:28:37","modified_gmt":"2022-11-17T12:28:37","slug":"syed-fazl-ur-rehman","status":"publish","type":"graduate","link":"https:\/\/habib.edu.pk\/graduate-directory\/graduate\/syed-fazl-ur-rehman\/","title":{"rendered":"SYED FAZL UR REHMAN"},"content":{"rendered":"","protected":false},"excerpt":{"rendered":"","protected":false},"author":3,"featured_media":2145,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"single-graduate-01.php","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"program":[30],"school":[],"class":[13],"minor":[],"class_list":["post-2142","graduate","type-graduate","status-publish","format-standard","has-post-thumbnail","hentry","program-bsee","class-class-of-2020"],"acf":{"aspiration_statement":"I am passionate about becoming an electrical engineer that is able to solve real-life engineering problems and enables me to impact society in a positive way. I want to pursue a career in my field that enhances my command over power electronics and feedback control.","video_profile_link":"","habib_email":"sr02910@alumni.habib.edu.pk","email":"sfazlrehman@gmail.com","linkedin_link":"https:\/\/www.linkedin.com\/in\/sfazlrehman","portfolio_Title":"","portfolio_link":"","personal_cell_1":"","personal_cell_2":"","core_skills":[{"skill":"Circuit Design & Analysis"},{"skill":"C++, Python, Verilog"},{"skill":"Softwares: MATLAB, LabVIEW, OrCAD, PSpice, Vivado, Packet Tracer, PLC, Modelsim, ISE, MS office "},{"skill":"Devices\/boards: Spartan, Zedboard (FPGA), Arduino UNO) "},{"skill":"Design Thinking and Data Analysis"}],"academic_awards":[{"academic_record":"HU TOPS 100% Scholarship"}],"leadership-experiences":[{"leadership":"Invent for the Planet\u201919 - Participant "},{"leadership":"Robotics and Programming Summer Camp, Knowledge Valley School - Lead"},{"leadership":"SIUT, Dar-ul-Sukun and Mashal Academy - Volunteered"}],"work-experience":[{"experience":"Jaffer Brothers (Pvt) Ltd. - Operations"},{"experience":"Atlas Honda - Intern"}],"publications-projects":[{"publications_title":"Game Development","publications":"Design and development of an interesting game for Object Oriented Programming course using C++ language."},{"publications_title":"Voice Recognition Software","publications":"Identifying the voice of a person or animal using digital signal processing techniques."},{"publications_title":"Fault-Tolerant RISC-V Architecture","publications":"Design and Implementation of a Fault-tolerant RISC-V architecture on FPGA using Partial Reconfiguration to prevent processors in space from the effects of high radiation which may alter the functionality of the processor while performing sensitive tasks."}],"project_title":"Design and Implementation of Fault-Tolerant RISC-V Architecture on FPGA","fyp_desc":"Project Objective: Digital systems are vulnerable to run-time faults \r\nbecause of external conditions which alter the functionality of the \r\ncircuit. There is a need of designing a fault-tolerant and self-healing \r\nthe architecture along with the implementation of a soft-core processor for sensitive applications which involve highly classified data. \r\n\r\nProject Implementation Method: Implementation of the RISC-V processor is done on Zedboard (FPGA) using Vivado (software). Fault-tolerant architecture is implemented using the same software (Vivado). Communication with FPGA using software is developed in Python with the help of the Tkinter toolkit. \r\n\r\nBenefits of the Project: The sensitive defence industry requires \r\nboth a fault-tolerant architecture and the FPGA integrated with open \r\ninstruction set architecture (ISA). Therefore, there is a need to design a \r\nfault-tolerant RISC-V architecture and implemented it on FPGA. This novel approach will also enable educational institutes to perform quality research using the way forward. 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