{"id":2069,"date":"2022-11-08T11:08:47","date_gmt":"2022-11-08T06:08:47","guid":{"rendered":"https:\/\/habib.edu.pk\/graduate-directory\/?post_type=graduate&#038;p=2069"},"modified":"2022-11-14T18:11:25","modified_gmt":"2022-11-14T13:11:25","slug":"rohan-khan","status":"publish","type":"graduate","link":"https:\/\/habib.edu.pk\/graduate-directory\/graduate\/rohan-khan\/","title":{"rendered":"ROHAN KHAN"},"content":{"rendered":"","protected":false},"excerpt":{"rendered":"","protected":false},"author":3,"featured_media":2070,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"single-graduate-01.php","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"program":[30],"school":[],"class":[13],"minor":[19],"class_list":["post-2069","graduate","type-graduate","status-publish","format-standard","has-post-thumbnail","hentry","program-bsee","class-class-of-2020","minor-mathematics"],"acf":{"aspiration_statement":"My career aspiration is to achieve a Masters as well as a doctorate degree in the future. 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Devices and processors used in such critical conditions require a high level of protection, accuracy and security. Keeping this scenario in mind, the aim is to design a processor with fault-tolerant capability. The approach to this problem is based on designing and implementing a RISC-V Architecture on FPGA and making it fault-tolerant. The key features of the solution include the implementation of RISC-V on FPGA which offers the advantage of reduced and simple instructions set while developing a fault-tolerant ALU for architecture is another key feature for sensitive applications. It will benefit the space exploration and aircraft manufacturing industries which demand zero tolerance levels for faults. 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