This talk will be comprises of modern ways of doing Hardware and Software design by using Virtual Prototypes which not only helps reduce Time-To-Market (TTM) of products but also helps in catching bugs in early stage of design. In first half of the talk, comparison between traditional methodology vs Virtual Prototypes will be discussed and advantages of Virtual Prototypes for both Hardware and Software design. Methodology involved in Virtual Prototypes which consists of SystemC and TLM Modeling will be discussed in second half and also difference between Virtual Prototypes for Hardware Design and Software Design.
Time required for the talk: 40mins